Renesas M3A-HS19 Manuel d'utilisateur

REJ10J1351-0101 Rev. 1.01 Issued : Oct 28, 2008 32 Renesas 32-Bit RISC MicrocomputersSuperHTM RISC engine Family/SH

Overview 1.6 M3A-HS19 Board Overview Rev.1.01 Oct 28, 2008 1-6REJ10J1351-0101 1 1.6 M3A-HS19 Board Overview Figure 1.6.1 shows the M3A-HS19 bo

Overview 1.6 M3A-HS19 Board Overview Rev.1.01 Oct 28, 2008 1-7REJ10J1351-0101 1 Table 1.6.1 lists major components mounted on the M3A-HS19 Tabl

Overview 1.7 M3A-HS19 Memory Mapping Rev.1.01 Oct 28, 2008 1-8REJ10J1351-0101 1 1.7 M3A-HS19 Memory Mapping Area 0 bus width: (Default) MD3

Overview 1.8 Absolute Maximum Ratings Rev.1.01 Oct 28, 2008 1-9REJ10J1351-0101 1 1.8 Absolute Maximum Ratings Table 1.8.1 lists the absolute m

Overview 1.8 Absolute Maximum Ratings Rev.1.01 Oct 28, 2008 1-10REJ10J1351-0101 1 This page intentionally left blank

2-1 Chapter2Features and Specifications Chapter2 Features and Specifications

Features and Specifications 2.1 Features Rev.1.01 Oct 28, .2008 2-2REJ10J1351-0101 2 2.1 Features Table 2.1.1 lists the functional modules. Tab

Features and Specifications 2.2 CPU Rev.1.01 Oct 28, .2008 2-3REJ10J1351-0101 2 2.2 CPU 2.2.1 SH7619 The M3A-HS19 CPU board includes the SH7619

Features and Specifications 2.3 Memory Rev.1.01 Oct 28, .2008 2-4REJ10J1351-0101 2 2.3 Memory The M3A-HS19 includes the SH7619 on-chip U memory,

Features and Specifications 2.3.2 Flash Memory S29GL032A90TFIR4 (Standard component) Rev.1.01 Oct 28, .2008 2-5REJ10J1351-0101 2 Table 2.3.2 Se

1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use

Features and Specifications 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-6REJ10J1351-0101 2 2.3.3 External Synchronous DRAM (SDRAM

Features and Specifications 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-7REJ10J1351-0101 2 A power-on sequence is required to use

Features and Specifications 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-8REJ10J1351-0101 2 Figure 2.3.4 shows a timing example of

Features and Specifications 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-9REJ10J1351-0101 2 Table2.3.5 lists setting examples of th

Features and Specifications 2.3.3 External Synchronous DRAM Rev.1.01 Oct 28, .2008 2-10REJ10J1351-0101 2 Figure 2.3.5 SDRAM Single Read/Write

Features and Specifications 2.3.4 External EEPROM Rev.1.01 Oct 28, .2008 2-11REJ10J1351-0101 2 2.3.4 External EEPROM The M3A-HS19 is provided wi

Features and Specifications 2.3.4 External EEPROM Rev.1.01 Oct 28, .2008 2-12REJ10J1351-0101 2 Figure 2.3.7 EEPROM-AC Timing SKCSDIDOHi-ZREAD

Features and Specifications 2.4 Serial Port Interface Rev.1.01 Oct 28, .2008 2-13REJ10J1351-0101 2 2.4 Serial Port Interface The SH7619 MCU mou

Features and Specifications 2.5 PCMCIA Card Interface Rev.1.01 Oct 28, .2008 2-14REJ10J1351-0101 2 2.5 PCMCIA Card Interface The SH7619 MCU mo

Features and Specifications 2.6 LAN Port Interface Rev.1.01 Oct 28, .2008 2-15REJ10J1351-0101 2 2.6 LAN Port Interface An IEEE 802.3 compliant

Rev. 1.01 Oct 28, 2008 (i)REJ10J1351-0101 Table of Contents Chapter1 Overview...

Features and Specifications 2.7 I/O Port Rev.1.01 Oct 28, .2008 2-16REJ10J1351-0101 2 2.7 I/O Port Following I/O ports on the M3A-HS19 can be co

Features and Specifications 2.7 I/O Port Rev.1.01 Oct 28, .2008 2-17REJ10J1351-0101 2 Table 2.7.2 I/O Port Features (1/2) Port Name (SH7619) Sign

Features and Specifications 2.7 I/O Port Rev.1.01 Oct 28, .2008 2-18REJ10J1351-0101 2 Table 2.7.3 I/O Port Features (2/2) Port Name (SH7619) Sign

Features and Specifications 2.8 Power Supply Circuit Rev.1.01 Oct 28, .2008 2-19REJ10J1351-0101 2 2.8 Power Supply Circuit The main power s

Features and Specifications 2.9 Clock Module Rev.1.01 Oct 28, .2008 2-20REJ10J1351-0101 2 2.9 Clock Module The clock module on the M3A-HS19 cons

Features and Specifications 2.10 Reset Module Rev.1.01 Oct 28, .2008 2-21REJ10J1351-0101 2 2.10 Reset Module Reset module controls reset signals

Features and Specifications 2.11 Interrupt Switch Rev.1.01 Oct 28, .2008 2-22REJ10J1351-0101 2 2.11 Interrupt Switch Push-button switches are co

Features and Specifications 2.12 E10A-USB Interface Rev.1.01 Oct 28, .2008 2-23REJ10J1351-0101 2 2.12 E10A-USB Interface The M3A-HS19 is provide

Features and Specifications 2.12 E10A-USB Interface Rev.1.01 Oct 28, .2008 2-24REJ10J1351-0101 2 This page intentionally left blank.

3-1 Chapter3Operational Specifications Chapter3 Operational Specifications

Rev. 1.01 Oct 28, 2008 (ii)REJ10J1351-0101 3.2.2 Features of Switches and LEDs...

Operational Specifications 3.1 M3A-HS19 Connector Rev.1.01 Oct.28.2008 3-2REJ10J1351-0101 3 3.1 M3A-HS19 Connectors Figure 3.1.1 shows the conn

Operational Specifications 3.1.1 UART Connector Pin (J1) Rev.1.01 Oct.28.2008 3-3REJ10J1351-0101 3 3.1.1 UART Connector Pin (J1) The M3A-HS19

Operational Specifications 3.1.2 UART Connector (J2) Rev.1.01 Oct.28.2008 3-4REJ10J1351-0101 3 3.1.2 UART Connector (J2) The M3A-HS19 is prov

Operational Specifications 3.1.3 RS-422 Connector Pin (J3) Rev.1.01 Oct.28.2008 3-5REJ10J1351-0101 3 3.1.3 RS-422 Connector Pin (J3) The M3A-H

Operational Specifications 3.1.4 PCMCIA Connector (J4) Rev.1.01 Oct.28.2008 3-6REJ10J1351-0101 3 3.1.4 PCMCIA Connector (J4) The M3A-HS19 is p

Operational Specifications 3.1.4 PCMCIA Connector (J4) Rev.1.01 Oct.28.2008 3-7REJ10J1351-0101 3 Table 3.1.4 lists the pin assignment for the P

Operational Specifications 3.1.5 LAN Connector (J5) Rev.1.01 Oct.28.2008 3-8REJ10J1351-0101 3 3.1.5 LAN Connector (J5) The M3A-HS19 is provide

Operational Specifications 3.1.6 H-UDI Connector (J6) Rev.1.01 Oct.28.2008 3-9REJ10J1351-0101 3 3.1.6 H-UDI Connector (J6) The M3A-HS19 is pro

Operational Specifications 3.1.7 Power Supply Connector (J7) Rev.1.01 Oct.28.2008 3-10REJ10J1351-0101 3 3.1.7 Power Supply Connector (J7) The

Operational Specifications 3.1.8 External Power Supply Connector (J8) Rev.1.01 Oct.28.2008 3-11REJ10J1351-0101 3 3.1.8 External Power Supply Co

1-1 Chapter1 Overview Chapter1 Overview

Operational Specifications 3.1.9 Expansion Connectors (J9-J13) Rev.1.01 Oct.28.2008 3-12REJ10J1351-0101 3 3.1.9 Expansion Connectors (J9-J13)

Operational Specifications 3.1.9 Expansion Connectors (J9-J13) Rev.1.01 Oct.28.2008 3-13REJ10J1351-0101 3 Table 3.1.10 Pin assignment for Expans

Operational Specifications 3.1.9 Expansion Connectors (J9-J13) Rev.1.01 Oct.28.2008 3-14REJ10J1351-0101 3 Table 3.1.12 Pin assignment for Expans

Operational Specifications 3.2 Switches and LEDs Rev.1.01 Oct.28.2008 3-15REJ10J1351-0101 3 3.2 Switches and LEDs The M3A-HS19 is provided wit

Operational Specifications 3.2.1 Jumpers (JP1 - JP9) Rev.1.01 Oct.28.2008 3-16REJ10J1351-0101 3 3.2.1 Jumpers (JP1 - JP9) The M3A-HS19 is prov

Operational Specifications 3.2.1 Jumpers (JP1 - JP9) Rev.1.01 Oct.28.2008 3-17REJ10J1351-0101 3 Table 3.2.1 M3A-HS19 Jumper Settings (JP1) Jumpe

Operational Specifications 3.2.2 Features of Switches and LED Rev.1.01 Oct.28.2008 3-18REJ10J1351-0101 3 3.2.2 Features of Switches and LEDs

Operational Specifications 3.2.2 Features of Switches and LED Rev.1.01 Oct.28.2008 3-19REJ10J1351-0101 3 Table 3.2.8 lists the SW4 features.

Operational Specifications 3.3 Dimensions Rev.1.01 Oct.28.2008 3-20REJ10J1351-0101 3 3.3 Dimensions Figure 3.3.1 shows the M3A-HS19 dimensions.

Appendix M3A-HS19 SCHEMATICS A-1

Overview 1.1 Overview Rev.1.01 Oct 28, 2008 1-2REJ10J1351-0101 1 1.1 Overview The M3A-HS19 is a CPU board designed to evaluate the feature and

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1122334455A AB BC CD DRENESAS SOLUTIONS CORPORATIONDATEAPPROVEDSCALEDESIGNEDCHECKEDDRAWNCHANGE(/)17DK30575-C08-08-19Ver.1.01M3A-HS19INDEXRENESAS SOLUT

1122334455A AB BC CD DA0A9A10A20A[0:25]D2D3D12D14A11PA23/RXD_SIO0A23A15D0D8A2D13A8PA22/SIOMCLK0A22A14D7A1D11A7A5PA21/SCK_SIO0A21A13PA25/SIOFSYNC0A25A1

1122334455A AB BC CD DDD0DD2DD9DD4DD1DD13DD12DD6DD14DD15DD3DD8DD11DD7DD5DD10A2A14A20A10A15A21A11A12A4A5A17A13A16A6A18A7A8A3A9A19A22A1A23_WE0/DQMLLA4A6

1122334455A AB BC CD D_BPCCD2_BPCCD1BPCA6BPCA5BPCA4BPCA3BPCA2BPCA1BPCA0A5A3A0A2A4BPCCE1_BPCCD2_BPCCD1A1BPCCE2BPCREGBPCOEBPCWEBPCIORDBPCIOWRBPCA7BPCA8B

1122334455A AB BC CD DTMS[2]MD5 [2,4]PE00/HIFEBL/SCK_SIO0 [2,6]TDI[2]TDO[2]_TRST[2]_RES [2,3,4,6]TCK[2] _ASEMD [2]FLASH_WP [3]PE03/HIFMD [2]_RESET_IN[

1122334455A AB BC CD DA21A19A20A18A17A15A13A16A14A12A11DD14DD15DD13DD10DD12DD11DD9DD6DD7DD8DD2DD5DD3DD4DD1DD0A10A5A6A3A2A1A0A4_RDPB11/_CS4 PE06/_HIFWR

1122334455A AB BC CD DVCC 3VCC 1.8VCCVCC3VCCPCVCCRENESAS SOLUTIONS CORPORATIONDATEAPPROVEDSCALEDESIGNEDCHECKEDDRAWNCHANGE(/)77DK30575-C08-08-19Ver.1.0

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Revision History SH7619 CPU Board M3A-HS19User's Manual Rev. Date Description Page Summary 1.00 Aug 28, 2008 - First edition issued.

Overview 1.3 External Specification Rev.1.01 Oct 28, 2008 1-3REJ10J1351-0101 1 1.3 External Specifications Table 1.3.1 lists external specifica

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SH7619 CPU Board M3A-HS19 User's Manual Publication Date Oct 28, 2008 Rev. 1.01 Published by Renesas

M3A-HS19 User's Manual

Overview 1.4 Rev.1.01 Oct 28, 2008 1-4REJ10J1351-0101 1 1.4 Appearance Figure 1.4.1 shows the appearance of the M3A-HS19. Figure 1.4.1 M3

Overview 1.5 M3A-HS19 Block Diagram Rev.1.01 Oct 28, 2008 1-5REJ10J1351-0101 1 1.5 M3A-HS19 Block Diagrams Figure 1.5.1 shows the system block