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3
3-55 M32R-FPU Software Manual (Rev.1.01)
[Supplemental Operation Description]
The results of the FTOI instruction executed based on the Rsrc value, both when DN = 0 and DN = 1,
are shown in below.
DN = 0
Rsrc Value (exponent with no bias) Rdest Exception
Rsrc ≥ 0 +Infinity When EIT occurs: no change Invalid Operation Exception
127 ≥ exp ≥ 31 Other EIT: H'7FFF FFFF
30 ≥ exp ≥ -126 H'0000 0000 to H'7FFF FF80 No change (Note 1)
+Denormalized value No change Unimplemented Exception
+0 H'0000 0000 No change
Rsrc < 0 -0
-Denormalized value No change Unimplemented Exception
30 ≥ exp ≥ -126 H'0000 0000 to H'8000 0080 No change (Note 1)
127 ≥ exp ≥ 31 When EIT occurs: no change Invalid Operation Exception
-Infinity Other EIT: H'8000 0080 (Note 2)
NaN QNaN When EIT occurs: no change Invalid Operation Exception
Other EIT:
SNaN Signed bit = 0:H’7FFF FFFF
Signed bit = 1:H’8000 0000
Note 1: Inexact Exception occurs when rounding is performed.
2: Inexact Exception does not occur when Rsrc = H’CF00 0000.
DN = 1
Rsrc Value (exponent with no bias) Rdest Exception
Rsrc ≥ 0 +Infinity When EIT occurs: no change Invalid Operation Exception
127 ≥ exp ≥ 31 Other EIT: H'7FFF FFFF
30 ≥ exp ≥ -126 H'0000 0000 to H'7FFF FF80 No change (Note 1)
+0, +Denormalized value H'0000 0000 No change
Rsrc < 0 -0, -Denormalized value
30 ≥ exp ≥ -126 H'0000 0000 to H'8000 0080 No change (Note 1)
127 ≥ exp ≥ 31 When EIT occurs: no change Invalid Operation Exception
-Infinity Other EIT: H'8000 0000 (Note 2)
NaN QNaN When EIT occurs: no change Invalid Operation Exception
Other EIT:
SNaN Signed bit = 0:H’7FFF FFFF
Signed bit = 1:H’8000 0000
Note 1: Inexact Exception occurs when rounding is performed.
2: Inexact Exception does not occur when Rsrc = H’CF00 0000.
INSTRUCTIONS
3.2 Instruction description
FTOIFTOI
floating point Instructions
Float to Integer
[M32R-FPU Extended Instruction]
- To our customers 1
- REVISION HISTORY 5
- M32R-FPU Software Manual 5
- Table of contents 6
- CHAPTER 3 INSTRUCTIONS 7
- APPENDIX 7
- CHAPTER 1 9
- CPU PROGRAMMIING MODEL 9
- 1.1 CPU Register 10
- 1.2 General-purpose Registers 10
- 1.3 Control Registers 11
- CPU PROGRAMMING MODEL 12
- 1.4 Accumulator 19
- 1.5 Program Counter 19
- 1.6 Data Format 20
- 1.7 Addressing Mode 23
- CHAPTER 2 25
- INSTRUCTION SET 25
- 2.1 Instruction set overview 26
- 2.2 Instruction format 36
- CHAPTER 3 39
- 3.2 Instruction description 43
- Add 3-operand 45
- Add immediate 46
- Add with overflow checking 47
- Add with carry 49
- AND 3-operand 51
- Bit clear 52
- M32R-FPU Extended Instruction 52
- BCLRBCLR 53
- Branch on equal to 54
- BEQZBEQZ 55
- BGEZBGEZ 56
- BGTZBGTZ 57
- Branch and link 58
- BLEZBLEZ 59
- BLTZBLTZ 60
- Branch on not C-bit 61
- Branch on not equal to 62
- BNEZBNEZ 63
- BSETBSET 65
- BTSTBTST 66
- CLRPSWCLRPSW 67
- Compare immediate 69
- Compare unsigned 70
- Compare unsigned immediate 71
- Divide unsigned 73
- FADDFADD 74
- FCMPFCMP 76
- FCMPEFCMPE 78
- FDIVFDIV 80
- FMADDFMADD 82
- FMSUBFMSUB 85
- FMULFMUL 88
- FSUBFSUB 90
- FTOIFTOI 92
- FTOSFTOS 94
- ITOFITOF 96
- Jump and link 97
- LD24LD24 100
- Load byte 101
- INSTRUCTIONS 101
- Load halfword 102
- Load immediate 103
- LDUBLDUB 104
- LDUHLDUH 105
- LOCKLOCK 106
- MACHIMACHI 107
- MACLOMACLO 108
- MACWHIMACWHI 109
- MACWLOMACWLO 110
- Multiply 111
- MULHIMULHI 112
- MULLOMULLO 113
- MULWHIMULWHI 114
- MULWLOMULWLO 115
- Move register 116
- MVFACHIMVFACHI 117
- MVFACLOMVFACLO 118
- MVFACMIMVFACMI 119
- MVFCMVFC 120
- MVTACHIMVTACHI 121
- MVTACLOMVTACLO 122
- MVTCMVTC 123
- No operation 125
- Logical NOT 126
- OR 3-operand 128
- Round accumulator 129
- RACHRACH 131
- Remainder 133
- REMUREMU 134
- Return from EIT 135
- SETHSETH 136
- SETPSWSETPSW 137
- Shift left logical 138
- SLL3SLL3 139
- SLLISLLI 140
- Shift right arithmetic 141
- SRA3SRA3 142
- SRAISRAI 143
- Shift right logical 144
- SRL3SRL3 145
- SRLISRLI 146
- Store byte 149
- Store halfword 150
- [M32R-FPU Extended Mnemonic] 150
- Subtract 151
- SUBVSUBV 152
- SUBXSUBX 153
- TRAPTRAP 154
- UNLOCKUNLOCK 155
- UTOFUTOF 156
- Exclusive OR 157
- XOR3XOR3 158
- APPENDICES 159
- M32R-FPU 194
- REJ09B0112-0101Z 194
- Software Manual 194
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