Renesas M16C/30P Manuel d'utilisateur télécharger pdf (Page 76)

M3062PT2-EPB User’s Manual 4. Hardware Specifications

REJ10J0868-0200 Rev.2.00 January 16, 2006

(3) Timing Requirements

Tables 4.4 and Figure 4.3 list the timing requirements in memory expansion mode and microprocessor mode..

Table 4.4 Timing requirements

Actual MCU

[ns]

This product

[ns]

Symbol Item

Min. Max. Min. Max.

tsu(DB-RD) Data input setup time 40 55

tsu(RDY-BCLK) RDY# input setup time 30 45

tsu(HOLD-BCLK) HOLD# input setup time 40 55

th(RD-DB) Data input hold time 0 See left

th(BCLK-RDY) RDY# input hold time 0 See left

th(BCLK-HOLD) HOLD# input hold time 0 See left

td(BCLK-HLDA) HLDA# output delay time 40 See left

Figure 4.3 Timing requirements

* Compared with an actual MCU, this product enters high-impedance state after a 0.5 cycle delay.

Hi -Z

BCLK

HOLD input

HLDA output

P0,P1,P2,P3,P4,

0 - P5 2

tsu(HOLD-BCLK)

td(BCLK-HLDA)

th(BCLK-HOLD)

Hi -Z

BCLK

HOLD

HLDA

P0,P1,P2,P3,P4,

0 - P5 2

tsu(HOLD-BCLK)

td(BCLK-HLDA)

th(BCLK-HOLD)

Common to “with wait” and “no wait” (actual MCU)

Common to “with wait” and “no wait” (this product)

input

output

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