Renesas Single-Chip Microcomputer SH7203 Manuel d'utilisateur Page 2

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SuperH Solutions Technology Update: SH-2A CPU
Processors
with SH-2A
Superscalar
CPU
The SH-2A CPU core
is a 32-bit superscalar
design, upward
compatible from the
SH-2 CPU, which
executes two instructions
in parallel for twice the
throughput. Thus, MPUs
in the SH-2A series
provide more MIPS at
lower clock frequencies
for example, 480
Dhrystone MIPS at
200MHz — so they
consume less power
and generate less noise.
They provide an on-chip
hardware Floating Point
Unit (FPU) that
accelerates math
operations and signal
processing algorithms,
providing up to
2MFLOPS/MHz
performance. The devices
have fast interrupt
response and make
single-cycle context
switches. Moreover,
the SH-2A devices are
members of a scalable
product family, ensuring
a long product life.
For new system
designs, the
SuperH products
recommended in
the SH-2A series
are the following:
SH7203/SH7263
SH7670
SH7262/SH7264
SH7203/7263: Embedded Digital Audio Processors
with LCDC and USB 2.0 High-speed Host
Combining connectivity, LCD display controller, and digital audio
processing with a 200MHz SH-2A CPU that can handle both control
and human-machine interface (HMI) tasks
The microcontrollers in the SH7203/7263 series are single-chip solutions for car audio, home audio, and
similar digital audio and media systems, as well as HMI applications requiring an LCD GUI. Operating
at speeds up to 200MHz, they deliver enough performance to handle both signal processing for playing
encrypted digital audio files and displaying digital pictures, and embedded control tasks like motor
control. They include a high-speed USB 2.0 host interface for portable-audio-player connectivity, an LCD
controller for WVGA-size color screens, and a CD-ROM decoder (SH7263 only) and additional audio
peripherals, among many other on-chip functions.
These MPUs are supported by a comprehensive suite of system development tools and evaluation boards
from Renesas and partners. This support includes the Renesas SH7263 Evaluation Board with VGA TFT
LCD, which comes with Express Logic’s ThreadX
®
RTOS and USBX
and FileX
®
products, as well as
Swell Software’s Peg
GUI library product. The result is a ready-to-go solution that’s robust and saves
man-months of development time.
SH7203/SH7263 Benefits:
Provides enough computing power to handle
both control and signal-processing tasks
Allows MP3, WMA, AAC, and similar voice and
music data compression and expansion processing
to be executed by a single chip at a slower frequency
with a smaller program
Enables implementation of multi-CODEC compatibility
by software alone for greater design flexibility
Offers high ROM code efficiency, allowing reductions
in memory size and power consumption
Connects via USB 2.0 to portable audio players
and other devices and peripherals
Incorporates many functions required for audio systems,
making possible system cost-reductions
Has CAN controller that implements robust networking
Includes timer functions that can produce a 3-phase
output for controlling AC motors
Power management modes optimized for tasks being performed, helping to maximize battery life
Provides comprehensive support tools that help shorten system development cycles so products get to market in less time
DMAC
8 ch
INTC
BSC
ROM, SRAM,
SDRAM, PCMCIA
PIO
SRC
MTU2
5 ch
WDT
RTC
NAND
Flash
I/F
I
2
C
4 ch
16-bit
CMT
2 ch
USB 2.0
Host/Function HS
1 ch
CAN
2 ch
SSU
2 ch
Hi-speed
SCIF
4 ch
SSI
4 ch
CDR
DEC
LCDC
IE Bus
SD
Card
IF
DAC
8-bit
2 ch
FPU
Instr.
Cache
8KB
Data
Cache
8KB
URAM
64KB
16KB
SH-2A
200MHz
ADC
10-bit
8 ch
option
SH7263 Block Diagram
SH7265 Dual-core Processor for High-performance Automotive Control
Asynchronous dual-core architecture for embedded systems uses two 200MHz
SH-2A CPU cores to deliver up to 960 MIPS while keeping power consumption low
The 32-bit SH7265 dual-core processors achieve up to 960-MIPS/800-MFLOPS performance
(at 200MHz) — performance that, when combined with the on-chip peripheral functions, addresses the
design requirements of many high-end automotive engine, body control and safety system applications.
They save power while delivering the fast real-time control and processing performance that previously
required a DSP chip. Each of the chip’s SH2A-FPU cores has an 8KB cache, and there are 64Kbytes of
URAM on CPU0 (the primary CPU) and 32Kbytes on CPU1 (the secondary CPU). In a typical application,
CPU0 might provide system control, while CPU1 handles tasks such as motor control or communication
control. The SH7265’s many built-in peripherals include a USB v2.0 High-Speed (480-Mbps) interface,
ATAPI interface, and 2D graphics engine WQVGA/QVGA-size RGB outputs for image/video output
processing. Four separate clocks and six power-down modes allow tight control over power consumption.
The multi-core debugger connects using the same E10A H-UDI port connector that has been used in the past.
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