Renesas V850E2 Manuel d'utilisateur Page 1

V850E2/FG432-bit Single-Chip MicrocontrollerR01DS0139ED01002013-05-24Renesas Electronicswww.renesas.comµPD70F3548µPD70F3549µPD70F3550µPD70F4000µPD70F

10 R01DS0139ED0100Data SheetChapter 1 Overview 1.2 Pin Groups1.3 General measurement conditions1.3.1 AC characteristic measurement conditionAC test i

11 R01DS0139ED0100Data SheetChapter 2 Absolute maximum ratings Chapter 2 Absolute maximum ratings2.1 Supply voltagesTable 2-1 VDD DataParameter Symbo

12 R01DS0139ED0100Data SheetChapter 2 Absolute maximum ratings 2.2 Port voltages Table 2-3 Port Input voltageParameter Pin Group Symbolaa)The symbols

13 R01DS0139ED0100Data SheetChapter 2 Absolute maximum ratings 2.3 Port current2.4 CapacitanceTable 2-4 High level port output currentParameter Pin G

14 R01DS0139ED0100Data SheetChapter 2 Absolute maximum ratings 2.5 Thermal characteristicsThis section specifies the absolute maximum limitation of o

15 R01DS0139ED0100Data SheetChapter 3 Power supply specification Chapter 3 Power supply specification3.1 Requirements for external power supply conne

16 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.3 Power supply groupsFor each of the following power supply groups the same voltag

17 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.4 Supply voltagesTable 3-3 VDD Data Parameter Symbol ConditionRatingsUnitMin Typ M

18 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.4.1 AWO Regulator characteristicsTable 3-4 AWO Regulator characteristics Parameter

19 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.4.2 ISO0/ISO1 Regulator characteristics (M1 products)Table 3-5 ISO0/ISO1 regulator

2 R01DS0139ED0100Data Sheet Notice1. All information included in this document is current as of the date this document is issued. Such information,

20 R01DS0139ED0100Data SheetChapter 3 Power supply specification a)Required when using an external power transistor such as 2SD1584 (base connected t

21 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.4.4 POC characteristicsTable 3-6 POC characteristics 3.4.5 Voltage Comparator char

22 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.5 Power-up/-down sequence of external supply voltages3.5.1 External FLMDn Resistor

23 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.5.3 Condition 2M1products: RESET is usedM2 products: RESET is used; WAKE and PTCTL

24 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.5.4 Condition 5M2 products only. RESET is not used; PTCTL1 is usedNormal operating

25 R01DS0139ED0100Data SheetChapter 3 Power supply specification 3.5.5 Condition 6M2 products only. RESET is used; PTCTL1 is usedNormal operating mod

26 R01DS0139ED0100Data SheetChapter 4 Clock generators Chapter 4 Clock generators4.1 CPU clockTable 4-1 CPU clock frequency4.2 Peripheral clockTable

27 R01DS0139ED0100Data SheetChapter 4 Clock generators The main oscillator amplifier gain for the external resonator can be selected by MOSCC.MOSCCAM

28 R01DS0139ED0100Data SheetChapter 4 Clock generators .Figure 4-2 Recommended Sub Oscillator CircuitCaution Values of C1s, C2s and Rds depend on the

29 R01DS0139ED0100Data SheetChapter 4 Clock generators 4.4 PLL CharacteristicsTable 4-6 PLL characteristicsParameter Symbol ConditionRatingsUnitMin T

3 R01DS0139ED0100Data Sheet The quality grade of each Renesas Electronics product is “Standard” unless otherwise expressly specified in a Renesas El

30 R01DS0139ED0100Data SheetChapter 5 I/O specification Chapter 5 I/O specification5.1 Port Characteristics5.1.1 Condition settingsSome of the condit

31 R01DS0139ED0100Data SheetChapter 5 I/O specification 5.1.2 PgE0Table 5-2 PgE0 characteristicsParameter Symbol ConditionRatingsUnitMin Typ MaxHigh

32 R01DS0139ED0100Data SheetChapter 5 I/O specification 5.1.3 PgE1Table 5-3 PgE1 characteristicsParameter Symbol ConditionRatingsUnitMin Typ MaxHigh

33 R01DS0139ED0100Data SheetChapter 5 I/O specification 5.1.4 PgB0PgB0 is not available on V850E2/FG45.1.5 PgA0Table 5-4 PgA0 characteristicsParamete

34 R01DS0139ED0100Data SheetChapter 5 I/O specification

34R01DS0139ED0100Data SheetChapter 6 Supply current specification Chapter 6 Supply current specification6.1 Supply current of µPDF70F4000 / µPDF70F4

35 R01DS0139ED0100Data SheetChapter 6 Supply current specification 6.2 Supply current of µPDF70F3548 / µPDF70F3549 / µPDF70F3550Notes 1. The above cu

37 R01DS0139ED0100Data SheetChapter 7 Peripherals specification Chapter 7 Peripherals specification7.1 Reset timing7.2 NMI timingParameter Symbol Con

38 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.3 INTP timing7.4 FLMD0 timing7.5 _DCUTRST timingParameter Symbol ConditionRatingsUn

39 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.6 Timer timingTable 7-1 Timer timingParameter Symbol ConditionRatingsUnitMin Typ Ma

4 R01DS0139ED0100Data Sheet 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent o

40 R01DS0139ED0100Data SheetChapter 7 Peripherals specification TAUAnItTAIH tTAILTAUBnItTACYKTAUJnItWESH tWESLTAPAnESOtTBIH tTBILtTJIHtTJILtTBCYKtTCC

41 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.7 CSI timing7.7.1 Master modes(1) CSIG timingTable 7-2 CSIG timing (Master mode)Not

42 R01DS0139ED0100Data SheetChapter 7 Peripherals specification (2) CSIH timing master modeTable 7-3 CSIH timing (Master mode)Notes 1. n: Number of m

43 R01DS0139ED0100Data SheetChapter 7 Peripherals specification (3) Timing diagramsSCKO / SI / SOCSIG ( CSIGnCTL1 : CSIGnCKR/ CSIGnCFG0 :CHIGnDAP0 =

44 R01DS0139ED0100Data SheetChapter 7 Peripherals specification RYICSIGnCTL1 : CSIGnHSE=1, CSIGnCTL1 : CSIGnSIT = 0 )CSIHnCTL1 : CSIHnHSE=1, CSIHnCTL

45 R01DS0139ED0100Data SheetChapter 7 Peripherals specification CSSnCSIHnCFGm:CSIHnCKPm= 0,CSIHnCFGm:CHIHnDAPm= 0CSIHnCFGm:CSIHnCKPm= 0,CSIHnCFGm:CHI

46 R01DS0139ED0100Data SheetChapter 7 Peripherals specification CSIHnCTL1 : CSIHnSIT=0, CSIHnCFGm: CSIHnCKPm= 0,CSIHnCFGm: CHIHnDAPm= 0CSIHnCTL1 : CS

47 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.7.2 Slave mode(1) CSIG timing slave modeTable 7-4 CSIG timing (Slave mode)Note n: N

48 R01DS0139ED0100Data SheetChapter 7 Peripherals specification (3) Timing diagramsSCKO / SI / SOCSIG (CSIGnCTL1 : CSIGnCKR/ CSIGnCFG0 :CHIGnDAP0 = 0

49 R01DS0139ED0100Data SheetChapter 7 Peripherals specification RYOCSIG (CSIGnCTL1 : CSIGnCKR/ CSIGnCFG0 :CHIGnDAP0 = 0/0)CSIH (CSIHnCFGm:CSIHnCKPm/

5 R01DS0139ED0100Data Sheet Regional InformationSome information contained in this document may vary from country to country. Before using any Renes

50 R01DS0139ED0100Data SheetChapter 7 Peripherals specification SSI:CSIG (CSIGnCTL1 :CSIGnSSE=1, CSIGnCTL1 : CSIGnCKR,/ CSIGnCFG0 : CHIGnDAP0 = 0/0 o

51 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.9 FCN timingParameter Symbol ConditionRatingsUnitMin Typ MaxTransfer rate - - 1 Mbp

52 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.10 FlexRay timingParameter Symbol ConditionRatingsUnitMin Typ MaxTransfer rate - -

53 R01DS0139ED0100Data SheetChapter 7 Peripherals specification Port Name ConditionRatingsUnitMin Typ MaxFLX0TXENAFLX0TXENBdTxENRISE-FALLCload=25pF,

54 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.11 IIC timingTable 7-6 Normal modeParameter Symbol ConditionRatingsUnitMin Typ MaxS

55 R01DS0139ED0100Data SheetChapter 7 Peripherals specification Table 7-7 Fast modeNotes 1. P: Stop conditionNotes 1. S: Start conditionNotes 1. Sr:

56 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.12 Frequency Output Function (FOUT)Table 7-8 Frequency Output Function (FOUT)7.13 V

57 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.14 Voltage comparator characteristicsParameter Symbol ConditionRatingsUnitMin Typ M

58 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.15 LVI characteristicsTable 7-10 LVI characteristicsParameter Symbol ConditionRatin

59 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16 A/D Converter characteristics7.16.1 12bit A/D (for ADC channels without S/H func

6 R01DS0139ED0100Data Sheet Notes for CMOS Devices(1) Precaution against ESD for semiconductorsStrong electric field, when exposed to a MOS device,

60 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.2 12bit A/D (For channel ADCA0I0-5 when the S/H function is not used)Table 7-12

61 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.3 12bit A/D (When channel S/H function is used) Table 7-13 12bit A/D (When chann

62 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.4 10bit A/D (for ADC channels without S/H functionality)Table 7-14 10 bit A/D No

63 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.5 10bit A/D (For channel ADCA0I0-5 when the S/H function is not used)Table 7-15

64 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.6 10bit A/D (When channel S/H function is used)Table 7-16 10 bit A/D Notes 1. n:

65 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.16.7 Equivalent circuitCaution These specifications are not tested in outgoing insp

66 R01DS0139ED0100Data SheetChapter 7 Peripherals specification 7.17 Key ReturnTable 7-17Note n: Number of instances. Refer to the User Manual for th

67 R01DS0139ED0100Data SheetChapter 8 Memory specification Chapter 8 Memory specification8.1 Code flash specificationTable 8-1 Code flash8.2 Data fla

67R01DS0139ED0100Data SheetChapter 9 Pinning and package specification Chapter 9 Pinning and package specification9.1 Pinning specification(1) M1 Pr

68 R01DS0139ED0100Data SheetChapter 9 Pinning and package specification (2) M2 Product123456789101112131415161718192021222324252627282930313233343536

7R01DS0139ED0100Data Sheet Table of contentsChapter 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

69 R01DS0139ED0100Data SheetChapter 9 Pinning and package specification 9.2 Package specification

71 R01DS0139ED0100Data SheetChapter 10 Definition of terms Chapter 10 Definition of termsThe following sections describe the meaning of several terms

72 R01DS0139ED0100Data SheetChapter 10 Definition of terms (2) Total error This is the maximum value of the difference between the actually measured

73 R01DS0139ED0100Data SheetChapter 10 Definition of terms (3) Quantization errorThis is the error of ±1/2 LSB that always occurs when an analog valu

74 R01DS0139ED0100Data SheetChapter 10 Definition of terms (4) Zero-scale error This is the difference between the actually measured value of the ana

75 R01DS0139ED0100Data SheetChapter 10 Definition of terms (5) Full-scale errorThis is the difference between the actually measured value of the anal

76 R01DS0139ED0100Data SheetChapter 10 Definition of terms (6) Differential linearity error Ideally, the width at which a specific code is output is

77 R01DS0139ED0100Data SheetChapter 10 Definition of terms (7) Integral linearity errorThis indicates the degree to which the conversion characterist

77R01DS0139ED0100Data Sheet Revision HistoryVersion Date Document number Description1.0 2013-05-24 R01DS0139ED0100 Initial versionDocument was EASE

8R01DS0139ED0100Data Sheet 5.1.4 PgB0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9 R01DS0139ED0100Data SheetChapter 1 Overview Chapter 1 Overview1.1 Naming1.1.1 Alternative function pinsExample:– TAUB0I0, TAUB1I5– URTE0TX, URTE0RX