Renesas R8C/17 Guide de l'utilisateur télécharger pdf (Page 14)

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Carry (C) Flag: This flag retains a carry, borrow or shift out bit that has occurred

in the arithmetic/logic operations.

Debug (D) Flag: This D flag is used extensively for debugging purpose. During

normal use, it must be set with 0.

Zero (Z) Flag: This flag is set to 1 when an arithmetic operation resulted in

0.Otherwise, it is 0.

Sign (S) Flag: This flag is set to 1 when an arithmetic operation resulting in a

negative value. Otherwise, it is 0.

Overflow (0) Flag: This flag is set to 1 when the operation is resulted in an

overflow. Otherwise, it is 0.

Interrupt Enable (I) Flag: This flag enables a maskable interrupt. Maskable

interrupts are disabled when the I flag is 0 and are enabled when I flag is set to 1.

The I flag is cleared to 0 when the interrupt request is accepted.

Stack Pointer Select (U) Flag: ISP is selected when U flag is 0. USP is selected

when the U is set to 1. The U flag is cleared to 0 when a hardware interrupt

request is accepted or an INT instruction for software interrupt nos 1 to 31 is

executed.

Processor Interrupt Priority level (IPL): IPL is

configured with three bits to specify up to 8

processor priority levels from 0 to 7. If a

requested interrupt has priority greater than

IPL, then the interrupt is enabled.

Program counter (PC): This is a 20-bit

instruction that is to be executed.

This 20-bit INTB

of an interrupt vector table. This

interrupt

vector table can

be relocated to any

other place by

defining this INTB.

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 96 97

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Renesas R8C/17 Guide de l'utilisateur Page 14