
M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
Rev.1.00 Oct 01, 2002 page 29 of 110
REJ03B0134-0100Z
Fig. 8.5.3 Serial I/O Mode Register
b
7b
6 b
5b
4b
3 b
2b
1b0
S
e
r
i
a
l
I
/
O
m
o
d
e
r
e
g
i
s
t
e
r
(
S
M
)
[
A
d
d
r
e
s
s
0
0
D
C
1
6]
BName F
u
n
c
t
i
o
n
s
S
e
r
i
a
l
I
/
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M
o
d
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R
e
g
i
s
t
e
r
0
,
1I
n
t
e
r
n
a
l
s
y
n
c
h
r
o
n
o
u
s
c
l
o
c
k
s
e
l
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c
t
i
o
n
b
i
t
s
(
S
M
0
,
S
M
1
)
b
1
b
0
0
0
:
f
(
XI
N)
/
4
0
1
:
f
(
X
I
N)
/
1
6
1
0
:
f
(
X
I
N)
/
3
2
1
1
:
f
(
X
I
N)
/
6
4
2
S
y
n
c
h
r
o
n
o
u
s
c
l
o
c
k
s
e
l
e
c
t
i
o
n
b
i
t
(
S
M
2
)
3
Serial I/O port
selection bit (SM3)
6
5
T
r
a
n
s
f
e
r
d
i
r
e
c
t
i
o
n
s
e
l
e
c
t
i
o
n
b
i
t
(
S
M
5
)
0: P2
0, P21
1: SCLK, SOUT
0: External clock
1: Internal clock
0: LSB first
1: MSB first
Fix this bit to “0.”
7
N
o
t
h
i
n
g
i
s
a
s
s
i
g
n
e
d
.
T
h
i
s
b
i
t
i
s
a
w
r
i
t
e
d
i
s
a
b
l
e
b
i
t
.
W
h
e
n
t
h
i
s
b
i
t
i
s
r
e
a
d
o
u
t
,
t
h
e
v
a
l
u
e
i
s
“
0
.
”
A
f
t
e
r
r
e
s
e
t
RW
0
0
0
0
0
0RW
RW
RW
R
RW
RW
0R
—
S
e
r
i
a
l
i
n
p
u
t
p
i
n
s
e
l
e
c
t
i
o
n
b
i
t
(
S
M
6
)
0
:
I
n
p
u
t
s
i
g
n
a
l
f
r
o
m
S
I
N
p
i
n
.
1
:
I
n
p
u
t
s
i
g
n
a
l
f
r
o
m
S
O
U
T
p
i
n
.
0
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