Renesas PROM Programming Adapter PCA7408 Manuel d'utilisateur télécharger pdf (Page 39)

M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP

Rev.1.00 Oct 01, 2002 page 39 of 110

REJ03B0134-0100Z

8.6.6 START Condition Generation Method

When the ESO bit of the I

C control register (address 00DA16) is “1,”

execute a write instruction to the I

C status register (address 00D916)

to set the MST, TRX and BB bits to “1.” A START condition will then

be generated. After that, the bit counter becomes “000

2” and an SCL

is output for 1 byte . The START condition generation timing and BB

bit set timing are different in the standard clock mode and the high-

speed clock mode. Refer to Figure 8.6.9 for the START condition

generation timing diagram, and Table 8.6.2 for the START condition/

STOP condition generation timing table.

Fig. 8.6.9 START Condition Generation Timing Diagram

C status registe

write signal

Set time for

BB flag

Hold time

Setup

time

SCL

SDA

BB flag

Setup

time

8.6.7 STOP Condition Generation Method

When the ESO bit of the I

C control register (address 00DA16) is “1,”

execute a write instruction to the I

C status register (address 00D916)

to set the MST bit and the TRX bit to “1” and the BB bit to “0”. A STOP

condition will then be generated. The STOP condition generation tim-

ing and the BB flag reset timing are different in the standard clock

mode and the high-speed clock mode. Refer to Figure 8.6.10 for the

STOP condition generation timing diagram, and Table 8.6.2 for the

START condition/STOP condition generation timing table.

Fig. 8.6.10 STOP Condition Generation Timing Diagram

Table 8.6.2 START Condition/STOP Condition Generation Tim-

ing Table

Item

Setup time

(START condition)

Setup time

(STOP condition)

Hold time

Set/reset time

for BB flag

Standard Clock Mode

5.0 µs (20 cycles)

4.25 µs (17 cycles)

5.0 µs (20 cycles)

3.0 µs (12 cycles)

High-speed Clock Mode

2.5 µs (10 cycles)

1.75 µs (7 cycles)

2.5 µs (10 cycles)

1.5 µs (6 cycles)

Note: Absolute time at φ = 4 MHz. The value in parentheses denotes the

number of φ cycles.

BB flag

Reset time for

1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 111 112

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Renesas PROM Programming Adapter PCA7408 Manuel d'utilisateur Page 39

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