R8C/10 Group
Rev.1.20 Jan 27, 2006 page 109 of 180
REJ09B0019-0120
14.2 Repeat Mode
In repeat mode, the input voltage on one selected pin is A/D converted repeatedly. Table 14.3 lists the
specifications of repeat mode. Figure 14.5 shows the ADCON0 and ADCON1 registers in repeat
mode.
A
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
0
(
1
)
S
y
m
b
o
lA
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
A
D
C
O
N
00
0
D
6
1
6
0
0
0
0
0
X
X
X
2
7
6
5
4
3
2
1
0
A
n
a
l
o
g
i
n
p
u
t
p
i
n
s
e
l
e
c
t
b
i
t
(
2
)
0
0
0
:
A
N
0
i
s
s
e
l
e
c
t
e
d
0
0
1
:
A
N
1
i
s
s
e
l
e
c
t
e
d
0
1
0
:
A
N
2
i
s
s
e
l
e
c
t
e
d
0
1
1
:
A
N
3
i
s
s
e
l
e
c
t
e
d
1
0
0
:
A
N
4
i
s
s
e
l
e
c
t
e
d
1
0
1
:
A
N
5
i
s
s
e
l
e
c
t
e
d
1
1
0
:
A
N
6
i
s
s
e
l
e
c
t
e
d
1
1
1
:
A
N
7
i
s
s
e
l
e
c
t
e
d
C
H
0
B
i
t
s
y
m
b
o
lB
i
t
n
a
m
e Function
C
H
1
CH2
A
D
o
p
e
r
a
t
i
o
n
m
o
d
e
s
e
l
e
c
t
b
i
t
(
2
)
1 : Repeat mode
MD
A
D
S
T
A/D conversion start flag 0 : A/D conversion disabled
1 : A/D conversion started
F
r
e
q
u
e
n
c
y
s
e
l
e
c
t
b
i
t
0
(
3
)
0
:
f
A
D
/
4
i
s
s
e
l
e
c
t
e
d
1
:
f
A
D
/
2
i
s
s
e
l
e
c
t
e
d
C
K
S
0
R
W
A
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
1
(
1
)
S
y
m
b
o
l
A
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
A
D
C
O
N
10
0
D
7
1
6
0
0
1
6
Bit name FunctionBit symbol
7
6
5
4
3
2
1
0
b
2
b
1
b
0
N
O
T
E
S
:
1
.
I
f
t
h
e
A
D
C
O
N
0
r
e
g
i
s
t
e
r
i
s
r
e
w
r
i
t
t
e
n
d
u
r
i
n
g
A
/
D
c
o
n
v
e
r
s
i
o
n
,
t
h
e
c
o
n
v
e
r
s
i
o
n
r
e
s
u
l
t
i
s
i
n
d
e
t
e
r
m
i
n
a
t
e
.
2
.
W
h
e
n
c
h
a
n
g
i
n
g
A
/
D
o
p
e
r
a
t
i
o
n
m
o
d
e
,
s
e
t
a
n
a
l
o
g
i
n
p
u
t
p
i
n
a
g
a
i
n
.
3
.
T
h
i
s
b
i
t
i
s
v
a
l
i
d
w
h
e
n
t
h
e
C
K
S
1
b
i
t
i
n
t
h
e
A
D
C
O
N
1
r
e
g
i
s
t
e
r
i
s
s
e
t
t
o
“
0
”
.
N
O
T
E
S
:
1
.
I
f
t
h
e
A
D
C
O
N
1
r
e
g
i
s
t
e
r
i
s
r
e
w
r
i
t
t
e
n
d
u
r
i
n
g
A
/
D
c
o
n
v
e
r
s
i
o
n
,
t
h
e
c
o
n
v
e
r
s
i
o
n
r
e
s
u
l
t
i
s
i
n
d
e
t
e
r
m
i
n
a
t
e
.
2
.
I
n
r
e
p
e
a
t
m
o
d
e
,
t
h
e
B
I
T
S
b
i
t
m
u
s
t
b
e
s
e
t
t
o
“
0
”
(
8
-
b
i
t
m
o
d
e
)
.
3
.
T
h
e
φ
A
D
f
r
e
q
u
e
n
c
y
m
u
s
t
b
e
1
0
M
H
z
o
r
l
e
s
s
.
4
.
I
f
t
h
e
V
C
U
T
b
i
t
i
s
r
e
s
e
t
f
r
o
m
“
0
”
(
V
r
e
f
u
n
c
o
n
n
e
c
t
e
d
)
t
o
“
1
”
(
V
r
e
f
c
o
n
n
e
c
t
e
d
)
,
w
a
i
t
f
o
r
1
µ
s
o
r
m
o
r
e
b
e
f
o
r
e
s
t
a
r
t
i
n
g
A
/
D
c
o
n
v
e
r
s
i
o
n
.
B
I
T
S
8
/
1
0
-
b
i
t
m
o
d
e
s
e
l
e
c
t
b
i
t
(
2
)
0 : 8-bit mode
V
C
U
T
V
r
e
f
c
o
n
n
e
c
t
b
i
t
(
4
)
1 : Vref connected
Frequency select
bit 1
(3)
0 : CKS0 bit in ADCON0 register is valid
1 : f
AD
is selected
C
K
S
1
0
Must set to “0”
0
R
e
s
e
r
v
e
d
b
i
t
00
0
R
R
R
R
R
R
R
R
(b4)
Must set to “0”
R
e
s
e
r
v
e
d
b
i
t
(
b
5
)
00
M
u
s
t
s
e
t
t
o
“
0
”
Reserved bit
(
b
2
-
b
0
)
R
W
R
W
RW
R
W
R
W
R
W
M
u
s
t
s
e
t
t
o
“
0
”
Reserved bit
(
b
6
-
b
7
)
1
1
0
Figure 14.5 ADCON0 Register and ADCON1 Register in Repeat Mode
Item Specification
Function
Input voltage on one pin selected by CH2 to CH0 bits is A/D converted repeatedly
Start condition Set ADST bit to “1”
Stop condition Set ADST bit to “0”
Interrupt request generation timing
None generated
Input pin One of AN0 to AN7, as selected
Reading of result of A/D converter
Read AD register
Table 14.3 Repeat Mode Specifications
14.2 Repeat Mode
(11 pages)
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