R8C/10 Group 15. Programmable I/O Ports
Rev.1.20 Jan 27, 2006 page 120 of 180
REJ09B0019-0120
P
o
r
t
P
i
r
e
g
i
s
t
e
r
(
i
=
0
,
1
,
3
,
4
)
(1
,
2
)
S
y
m
b
o
lA
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
P
00
0
E
0
1
6
I
n
d
e
t
e
r
m
i
n
a
t
e
P
10
0
E
1
1
6
I
n
d
e
t
e
r
m
i
n
a
t
e
P
30
0
E
5
1
6
I
n
d
e
t
e
r
m
i
n
a
t
e
P
40
0
E
8
1
6
I
n
d
e
t
e
r
m
i
n
a
t
e
Bit name FunctionB
i
t
s
y
m
b
o
l RW
b
7b
6b
5b
4b
3b
2b
1b
0
P
i
_
0P
o
r
t
P
i
0
b
i
t
P
i
_
1P
o
r
t
P
i
1
b
i
P
i
_
2P
o
r
t
P
i
2
b
i
P
i
_
3P
o
r
t
P
i
3
b
i
P
i
_
4P
o
r
t
P
i
4
b
i
P
i
_
5P
o
r
t
P
i
5
b
i
P
i
_
6P
o
r
t
P
i
6
b
i
P
i
_
7P
o
r
t
P
i
7
b
i
The pin level on any I/O port which is
set for input mode can be read by
reading the corresponding bit in this
register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register
0 : “L” level
1 : “H” level
(
i
=
0
,
1
,
3
,
4
)
RW
R
W
R
W
R
W
R
W
RW
RW
R
W
N
O
T
E
S
:
1
.
B
i
t
s
P
3
_
4
t
o
P
3
_
6
i
n
t
h
e
P
3
r
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g
i
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r
a
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u
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M
C
U
.
I
f
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c
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s
a
r
y
t
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e
t
b
i
t
s
P
3
_
4
t
o
P
3
_
6
,
s
e
t
t
o
“
0
”
(
“
L
”
l
e
v
e
l
)
.
W
h
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n
r
e
a
d
,
t
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c
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.
2
.
B
i
t
s
P
4
_
0
t
o
P
4
_
4
i
n
t
h
e
P
4
r
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g
i
s
t
e
r
a
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u
n
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v
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a
b
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i
s
M
C
U
.
I
f
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n
e
c
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s
s
a
r
y
t
o
s
e
t
b
i
t
s
P
4
_
0
t
o
P
4
_
4
,
s
e
t
t
o
“
0
”
(
“
L
”
l
e
v
e
l
)
.
W
h
e
n
r
e
a
d
,
t
h
e
c
o
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n
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r
m
i
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a
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.
Figure 15.7 P0 Register, P1 Register, P3 Register, and P4 Register
Figure 15.6 PD0 Register, PD1 Register, PD3 Register, and PD4 Register
Port Pi direction register (i=0, 1, 3, 4)
(1, 2, 3)
S
y
m
b
o
lA
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
P
D
00
0
E
2
1
6
0
0
1
6
P
D
10
0
E
3
1
6
0
0
1
6
P
D
30
0
E
7
1
6
0
0
1
6
P
D
40
0
E
A
1
6
0
0
1
6
B
i
t
n
a
m
e FunctionB
i
t
s
y
m
b
o
lRW
b
7b
6b
5b4b
3b
2b
1b
0
PDi_0 Port Pi
0
direction bit
PDi_1 Port Pi
1
direction bi
PDi_2 Port Pi
2
direction bi
PDi_3 Port Pi
3
direction bi
PDi_4 Port Pi
4
direction bi
PDi_5 Port Pi
5
direction bi
PDi_6 Port Pi
6
direction bi
PDi_7 Port Pi
7
direction bi
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
N
O
T
E
S
:
1
.
T
h
e
P
D
0
r
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2
b
i
t
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n
t
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e
P
R
C
R
r
e
g
i
s
t
e
r
t
o
“
1
”
(
w
r
i
t
e
e
n
a
b
l
e
d
)
.
2
.
B
i
t
s
P
D
3
_
4
t
o
P
D
3
_
6
i
n
t
h
e
P
D
3
r
e
g
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r
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.
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t
b
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t
s
P
D
3
_
4
t
o
P
D
3
_
6
,
s
e
t
t
o
“
0
”
(
i
n
p
u
t
m
o
d
e
)
.
W
h
e
n
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a
d
,
t
h
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c
o
n
t
e
n
t
i
s
i
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d
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t
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r
m
i
n
a
t
e
.
3
.
B
i
t
s
P
D
4
_
0
t
o
P
D
4
_
4
,
P
D
4
_
6
a
n
d
P
D
4
_
7
i
n
t
h
e
P
D
4
r
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.
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s
s
a
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t
o
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e
t
b
i
t
s
P
D
4
_
0
t
o
P
D
4
_
4
,
P
D
4
_
6
a
n
d
P
D
4
_
7
,
s
e
t
t
o
“
0
”
(
i
n
p
u
t
m
o
d
e
)
.
W
h
e
n
r
e
a
d
,
t
h
e
c
o
n
t
e
n
t
i
s
i
n
d
e
t
e
r
m
i
n
a
t
e
.
RW
RW
RW
RW
RW
RW
RW
RW
(11 pages)
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