
R8C/10 Group 13. Serial Interface
Rev.1.20 Jan 27, 2006 page 89 of 180
REJ09B0019-0120
13. Serial Interface
Serial interface is configured with two channels: UART0 to UART1. UART0 and UART1 each have an
exclusive timer to generate a transfer clock, so they operate independently of each other.
Figure 13.1 shows a block diagram of UARTi (i=0, 1). Figure 13.2 shows a block diagram of the UARTi
transmit/receive.
UART0 has two modes:
clock synchronous serial I/O mode, and clock asynchronous serial I/O mode (UART
mode).
UART1 has only one mode,
clock asynchronous serial I/O mode (UART mode).
Figures 13.3 to 13.5 show the UARTi-related registers.
Figure 13.1 UARTi (i=0, 1) Block Diagram
Internal
External
Main clock or on-chip oscillator clock
Receive
clock
Transmit
clock
f
1SIO
1/8
f
8SIO
1/4
f
32SIO
1/2
CLK1 to CLK0=002
=012
=102
CKDIR=0
CKDIR=1
CLK0
(UART0)
RxD0
f
1SIO
1/(n0+1)
TxD
0
RxD1
CLK1 to CLK0=002
=012
=102
To P00
TxD10
TxD11
TXD1SEL=1
TXD1SEL=0
TXD1EN
1/(n1+1)
(UART1)
1/16
1/16
1/16
1/16
U0BRG register
f
8SIO
f
32SIO
f
1SIO
f
8SIO
f
32SIO
CLK
polarity
reversing
circuit
Clock synchronous type
(when internal clock is selected)
Clock synchronous type
(when external clock is selected)
UART reception
Clock synchronous
type
UART transmission
Clock synchronous
type
Clock synchronous type
(when internal clock is selected)
Reception
control circuit
Transmission control
circuit
Transmit/
receive
unit
UART reception
U1BRG
register
Internal
UART transmission
Reception
control circuit
Transmission
control circuit
Transmit/
receive
unit
Reception
control circuit
Transmission
control circuit
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