R8C/10 Group
Rev.1.20 Jan 27, 2006 page 147 of 180
REJ09B0019-0120
Figure 17.4 FMR1 and FMR4
F
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4
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F
M
R
40
1
B
31
6 0
1
0
0
0
0
0
02
7
6
5
4
3
2
1
0
Bit symbol Bit name F
u
n
c
t
i
o
n
Erase-suspend request bit
(2)
0: Erase restart
1: Erase-suspend request
FMR41
0
Erase-suspend function
enable bit
(1)
0: Invalid
1: Valid
R
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00
RO
R
W
R
W
R
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FMR40
FMR46
R
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d
b
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Set to “0”
(b7)
R
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“
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(
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5
-
b
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)
R
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:
1
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“
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“
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“
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2
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4
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“
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.
(
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b
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“
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.
)
00
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10
1
B
5
1
6
0
1
0
0
X
X
0
X
2
7
6
5
4
3
2
1
0
Bit symbol
B
i
t
n
a
m
eF
u
n
c
t
i
o
n
EW1 mode select bit
(1)
0: EW0 mode
1: EW1 mode
F
M
R
1
1
0
R
e
s
e
r
v
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d
b
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t
Set to “0”
Reserved bit
W
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d
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.
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d
b
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Set to “0”
00
R
W
R
O
R
W
RW
R
W
(
b
0
)
(
b
5
-
b
4
)
(b7)
Reserved bit
When read, its content is
indeterminate.
(
b
3
-
b
2
)
R
O
N
O
T
E
S
:
1
.
T
o
s
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t
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b
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o
“
1
”
,
w
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“
0
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a
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n
“
1
”
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F
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0
1
b
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=
1
.
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“
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a
f
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w
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g
“
0
”
.
T
h
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F
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R
0
1
a
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d
F
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R
1
1
b
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b
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a
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t
t
o
“
0
”
b
y
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t
t
i
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g
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h
e
F
M
R
0
1
b
i
t
t
o
“
0
”
.
N
o
t
h
i
n
g
i
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a
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s
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g
n
e
d
.
W
h
e
n
w
r
i
t
e
,
s
e
t
t
o
“
0
”
.
(
b
6
)
17.4 CPU Rewrite Mode
(11 pages)
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