Renesas Single-Chip Microcomputer M34519T-MCU Spécifications Page 10
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Noté. / 5. Basé sur avis des utilisateurs
3 V operation lineup
Remark
See Product Specication List (pp. 80 to 83) for details about the product specications.
Product Lineup
V850ES/SG2-H
32 MHz, 100-pin
V850ES/SJ2-H
32 MHz, 144-pin
V850ES/SG2
20 MHz, 100-pin
V850ES/SJ2
20 MHz, 144-pin
V850ES/SG1
20 MHz, 100-pin
V850ES/SG3
32 MHz, 100-pin
V850ES/SJ3
32 MHz, 144-pin
V850E/SK3-H
48 MHz, 176-pin
V850E/SJ3-H
48 MHz, 144-pin
V850E2/SG4-H
160 MHz, 100-pin
V850E2/SK4-H
160 MHz, 176-pin
V850E2/SJ4-H
160 MHz, 144-pin
In mass
production
Features
V850ES/SG2-H, SJ2-H
For car infotainment systems
66 MIPS @ 32 MHz, 3.0 to 3.6 V operation
ROM/RAM: 512 KB/40 KB, 640 KB/48 KB
On-chip LIN-compatible UART (4 ch max.), IEBus (1 ch),
multi-channel serial interface, clock monitor, CRC, DMAC,
and on-chip debugger
5 V withstand-voltage ports incorporated, and 5 V output is possible
by setting N-ch open-drain output
100-pin LQFP (SG2-H), 144-pin LQFP (SJ2-H)
V850E S/SG3
Car Audio
■ Car audio
4-/8-gradation
LCD
Control system signal
Speaker
KEY
CD unit
Antenna
ASSP for CD
µPD63763
PLL
Tuner unit
MPX
Audio DSP
(or electrical volume)
Microcontroller
(CD control)
RF
DAC
servo
DSP
MP3, WMA playback
MD unit
CAN, IEBus
driver
Power detection IC
Inter-automobile communication (CAN, IEBus...)
CD (MD)
changer unit
V850ES/Sx3,
V850E/Sx3-H
Driver
Microcontroller
(CD control)
V850ES/Sx3,
V850E/Sx3-H
Microcontroller
(display/key control)
78K0R, V850ES/Sx3,
V850E/Sx3-H
Power
amplier
Battery
(always on)
ACC
(on when engine is on)
Regulator
Driver
Power block
Display unit
Application examples
Audio system signal
64-pin 80-pin 100-pin 144-pin 176-pin and higher
Under
development
Under
planning
V850E2/SG4-H, SJ4-H, SK4-H
All Flash products, for car infotainment systems
325 MIPS @ 160 MHz, internal 1.1 to 1.3 V/external 3.0 to 3.6 V
ROM/RAM: 1 MB/96 KB to 2 MB/192 KB
On-chip LIN-compatible UART (5 ch max.), IEBus (1 ch), LVI, DMAC,
on-chip debugger, and Ethernet controller (V850E2/SK4-H only)
100-pin LQFP (SG4-H), 144-pin LQFP (SJ4-H), 176-pin LQFP (SK4-H)
V850ES/SG3, SJ3
All Flash products, for car infotainment systems
69 MIPS @ 32 MHz, 2.85 to 3.6 V operation
(A/D converter: 3.0 to 3.6 V)
ROM/RAM: 256 KB/24 KB to 1024 KB/60 KB
On-chip LIN-compatible UART (4 ch max.), IEBus (1 ch),
multi-channel serial interface, LVI, clock monitor, CRC, DMAC,
and on-chip debugger
5 V withstand-voltage ports incorporated, and 5 V output is possible
by setting N-ch open-drain output
100-pin LQFP (SG3), 144-pin LQFP (SJ3)
V850E/SJ3-H, SK3-H
All ash products, for car infotainment systems
95 MIPS @ 48 MHz, 2.85 to 3.6 V operation (A/D converter: 3.0 to 3.6 V)
ROM/RAM: 512 KB/60 KB (SJ3-H only), 768 KB/76 KB* (SJ3-H only),
1024 KB/76 KB*, 1280 KB/92 KB**, 1536 KB/92 KB**
On-chip UART (8 ch max. (including two UART channels with FIFO)),
IEBus (1 ch), multi-channel serial interface, LVI, clock monitor, CRC,
DMAC, real-time counter, SSCG***, and on-chip debugger
5 V withstand-voltage ports incorporated, and 5 V output is possible
by setting N-ch open-drain output
144-pin LQFP (SJ3-H), 176-pin LQFP (SK3-H)
* Includes 16 KB of expanded internal RAM.
** Includes 32 KB of expanded internal RAM.
*** Spread spectrum frequency synthesizer clock generator
V850ES/SG2, SJ2
For car infotainment systems
43 MIPS @ 20 MHz, 2.85 to 3.6 V operation (A/D converter: 3.0 to 3.6 V)
ROM/RAM: 256 KB/24 KB, 384 KB/32 KB, 512 KB/40 KB,
640 KB/48 KB
On-chip LIN-compatible UART (4 ch max.), IEBus (1 ch),
multi-channel serial interface, LVI, clock monitor, CRC, DMAC,
and on-chip debugger
5 V withstand-voltage ports incorporated, and 5 V output is possible
by setting N-ch open-drain output
100-pin LQFP (SG2), 100-pin QFP (SG2 (ROM: 256 KB/384 KB
versions only)), 144-pin LQFP (SJ2)
V850ES/SG1
For car infotainment systems
43 MIPS @ 20 MHz, 2.85 to 3.6 V operation (A/D converter: 3.0 to 3.6 V)
ROM/RAM: 256 KB/12 KB
On-chip IEBus (1 ch) and clock monitor
5 V withstand-voltage ports incorporated, and 5 V output is possible
by setting N-ch open-drain output
100-pin LQFP, 100-pin QFP
ASSP Lineup (Car Audio/Vehicle Navigation Control)
18 19
- 32-bit Microcontrollers 1
- Roadmap/Features 3
- Development environment 4
- Product Lineup 10
- CPU Roadmap 13
- CPU Comparison 13
- PFESiP Roadmap 13
- V850 Architecture 14
- Object Code Size Comparison 15
- (Dhrystone 1.1/Large model) 15
- V850E2, V850E2M Architecture 16
- V850E1, V850ES Architecture 16
- Memory Access 17
- Analog Circuits 17
- Timer/Counter 18
- Serial Interface 18
- Selector 19
- Detection level selection 19
- ResistorResistorResistor 19
- Ubiquitous Corporation 20
- V850 Benchmark 21
- Low Power Consumption 21
- Solutions for V850 22
- Features 23
- Rewrite Modes 23
- Flash Specification List 23
- 5 V Operation 3 V Operation 24
- 3 V Operation 3 V Operation 25
- V850E/MA3 V850E2/ME3 29
- V850E/ME2 29
- V850E/IG4 V850E/IH4 30
- V850E/IG4-H V850E/IH4-H 30
- V850E/IG3 V850E/IF3 30
- V850E/MA3 30
- V850E/IA1 V850E/IA2 31
- V850E/IA4 V850E/IA3 31
- V850ES/HG3 V850ES/HJ3 31
- V850ES/HE3 V850ES/HF3 31
- V850ES/IK1 V850ES/IE2 32
- V850E/DJ3 V850E/DL3 32
- V850E/DG3 V850E/DJ3 32
- V850ES/FJ3 V850ES/FK3 35
- V850ES/FE3-L 36
- V850ES/FF3-L V850ES/FG3-L 36
- V850ES/FE2 V850ES/FF2 36
- V850ES/FG2 V850ES/FJ2 36
- ASSP Lineup (CAN) (1/7) 37
- V850ES/JH3-E V850ES/JJ3-E 38
- V850ES/JC3-H V850ES/JE3-H 38
- V850ES/SG3 39
- V850ES/SJ3 39
- V850E/SJ3-H 39
- V850E/SJ3-H V850E/SK3-H 40
- V850ES/SG2-H V850ES/SG2 40
- V850ES/SJ2-H V850ES/SJ2 40
- V850ES/SG1 41
- V850 Development Environment 43
- Installation 44
- Building 44
- Debugging 44
- Emulator 45
- Flash Memory Programmers 46
- Production 47
- Development Tools 48
- Microcontrollers Website 49
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