Renesas Single-Chip Microcomputer M34519T-MCU Spécifications télécharger pdf (Page 19)

Products: V850E/IG4-H, IH4-H, ME2

V850E2/ME3, MN4, ML4

Compliant with Universal Serial Bus Specication

Support of 12 Mbps (full speed) transfer

Many endpoint congurations

Products: V850E/MA3, IA3, IA4, Dx3, Sx3-H

V850ES/SG1, Sx2, Sx2-H, Sx3, IK1

Instructions of address to be modied inserted to replace

DBTRAP instruction (JMP r0 instruction in case of V850

CPU), branching to 0060H (0000H in case of V850 CPU)

Program modication following switch to mask ROM

possible

Modied addresses: 4 points, 8 points*

* V850E/DJ3, Sx3-H

* JMP r0 instruction in case of V850 CPU

USB function 0 DMA

channel select

USB function 0 buffer

control register (UF0BC)

UFDRQn

DMAAKn

TCn

USBSP2B

USBSP4B

INTUSB0B

INTUSB1B

INTUSB2B

INTRSUM

USB

(48 MHz)

Remark n = 0 to 3

Selector

UDM

UDP

USB

I/O buffer

Control transfer: Endpoint0R (64 bytes)/Endpoint0W (64 bytes)

Bulk transfer 1: Endpoint1 (64 bytes × 2)/Endpoint2 (64 bytes × 2)

Bulk transfer 2: Endpoint3 (64 bytes × 2)/Endpoint4 (64 bytes × 2)

Interrupt transfer1/2: Endpoint7 (8 bytes)/Endpoint8 (8 bytes)

Endpoints

SIE

RSUM_OUT

USB SSCG

(Spread spectrum frequency synthesizer clock generator)

ROM correction Explanation of ROM correction operation

Download

modication

program

Correction

address enable

setting information

ROM correction

request ag = 0?

Yes

Read modication

program to RAM

Correction address

setting

ROM correction enable

Replace DBTRAP

instruction*

Main routine

Normal ow

ROM correction ow

Internal ROM

External ROM,

EEPROM, etc.

Internal RAM

Return to

internal ROM

Modication

program execution

RESET

Jump to

modication program

ROM correction

request ag clear

Correction address = XXXX

ROM correction

enable ag = 1

Next processing...

Correction point

Initialization

Modication

program download

Comparator

Output trigger

control circuit

DBTRAP instruction

generation block

Internal ROM

Instruction

replacement part

Instruction data bus

ROM correction

address register

Instruction address bus

Products: V850E/ME2, Dx3, Sx3-H, V850ES/Hx3, Fx3

V850E2/ME3

EMI peak noise reduction through input frequency

modulation

Large reduction in noise countermeasure time and cost

possible

Frequency modulation rate and modulation period

changeable by register setting

Modulation period

Without frequency modulation

With frequency modulation rate of -3%➔Modulation period: 13 to 27 kHz

Improvement of

10 dB or more

Frequency

modulation rate

* JMP r0 instruction for the V850 CPU

V850

Flash

Target system

On-chip debug emulator

MINICUBE

Host machine

• Break

• Execute

• Pin mask

• Download

• Execution time measurement

• Non-use of user resources

Clock monitor

On-chip debugger

Main clock

Internal reset signal

Internal oscillation

clock

reset

enable

Flag

Reset upon abnormal stop

Main clock oscillation monitoring

Run/stop settable by software

---

Reference

voltage

Flag

Interrupt signal

VDD

Reset signal

Selector

Detection level selection

ResistorResistorResistor

Products: V850E/IF3, IG3, Ix4, Ix4-H, Sx3-H

V850ES/Sx2, Sx3, Fx2, Fx3, Fx3-L, Jx3, Jx3-E,

Jx3-H, Jx3-L, Jx3-U, Hx3, IK1, IE2

V850E2/Fx4-L, Fx4, Fx4-M, Fx4-H, Fx4-G, Sx4-H

Detection voltage level changeable by using software

Can be used in place of reset IC, lowering system costs

Detection voltage not changeable after mode transition

(security protection)

Products: V850E/IA3, IA4, IF3, IG3, Ix4, Ix4-H, Dx3, Sx3-H

V850ES/SG1, Sx2, Sx2-H, Sx3, Fx2, Fx3, Fx3-L,

Jx3, Jx3-E, Jx3-H, Jx3-L, Jx3-U, Hx3, IK1, IE2

V850E2/Fx4-L, Fx4, Fx4-M, Fx4-H, Fx4-G, Sx4-H

Monitors abnormal stops of main clock by using internal oscillator

During abnormal stop, entire system can be set to reset status

Prevention of damage due to system deadlock or program loop

Products: V850E2/MN4, ML4, ME3*

, Fx4-L, Fx4, Fx4-M,

Fx4-H, Fx4-G, Sx4-H

V850E/ME2*

, MA3, IA4, IG3, Ix4, Ix4-H, DJ3,

DL3, Sx3-H

V850ES/Sx2, Sx2-H, Sx3, Fx2, Fx3, Fx3-L, Jx3,

Jx3-E, Jx3-H, Jx3-L, Jx3-U, Hx3

Realization of on-chip debugging of microcontroller with

DCU (debug control unit)

Compact and low-cost on-chip emulator

Downloading

Integrated debugger (ID850QB) supported

* 1. Tracing is possible by using the RTE-2000-TP made by Midas Lab

Co., Ltd.

* 2. Tracing is possible by using the RTE-2000-TP made by Midas Lab

Co., Ltd., or PARTNER-ET II, PARTNER-J made by Kyoto Micro

Computer Co., Ltd.

Low-voltage detector (LVI)

Other

36 37

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 50 51

Commentaires sur ces manuels

Pas de commentaire

Renesas Single-Chip Microcomputer M34519T-MCU Spécifications Page 19

Commentaires sur ces manuels

Produits connexes et manuels pour Mise en réseau Renesas Single-Chip Microcomputer M34519T-MCU